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submitted 2 days ago by soratoyuki@piefed.zip to c/privacy@lemmy.ml

If GrapheneOS stops supporting future Pixels, and Motorola is only targeting the flagship market for their compatible phones, we're looking at truly dark days ahead.

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[-] TrollAccount69@lemmy.ml 4 points 1 day ago

It’s really easy to come to that conclusion.

Realistically speaking a team is trying to hit a set of requirements under a set of constraints when they design a soc (or any cpu if you wanna dive into the cisc world and see the wild variation in security featureset across even the same generation of chips). That means using existing designs with a die shrink or something is often the right choice when you’re shooting for the low cost portion of the market. The technology referenced here, enhanced memory tagging extensions, is a hardware implementation of tagging that requires a specific revision of the arm design and it’s a relatively new change (mte, the precursor to emte, is flawed and not used).

So it’s not by dint of wanting to fuck you over that the designers of socs would make one without emte.

[-] grue@lemmy.world 2 points 1 day ago

That means using existing designs with a die shrink or something is often the right choice when you’re shooting for the low cost portion of the market. The technology referenced here, enhanced memory tagging extensions, is a hardware implementation of tagging that requires a specific revision of the arm design and it’s a relatively new change (mte, the precursor to emte, is flawed and not used).

I'm writing this on a Pixel 8 running GrapheneOS, which I'm pretty sure is a "recommended" device that supports all the security features and is also multiple generations old.

If new lower-end devices use die-shrink versions of previously flagship SoCs, as you say, then I simply do not buy the notion that there's any good reason not to put a die-shrink version of this SoC in a new lower-end phone.

[-] TrollAccount69@lemmy.ml 1 points 1 day ago

I don’t have the datasheet in front of me but I’m almost 100% sure your tensor doesn’t have emte, which is the type of mte the graphene people are requiring for new devices.

[-] grue@lemmy.world 3 points 1 day ago

From https://grapheneos.org/faq#recommended-devices :

8th generation and later Pixels also have support for the incredibly powerful hardware memory tagging security feature as part of moving to new ARMv9 CPU cores. GrapheneOS uses hardware memory tagging by default to protect the base OS and known compatible user installed apps against exploitation, with the option to use it for all apps and opt-out on a case-by-case basis for the few incompatible with it. Pointer authentication, branch target identification and other ARM security features were also introduced at the same time as hardware memory tagging.

[-] TrollAccount69@lemmy.ml 2 points 1 day ago* (last edited 1 day ago)

There’s mte and emte (it’s actually way more complicated than that). Mte was shown to be vulnerable to some exploit which is partly why emte got released. The graphene os people were saying the whole time they need a new platform with emte not just mte.

Which is one reason why only the elite version of whatever qualcomm soc qualifies.

Your pixel 8 supports mte, not emte.

I don’t have a pixel 8 in front of me to perform this check on but you could easily disprove what I just said by checking proc/cpuinfo for ID_AA64PFR1_EL1.MTEX, ID_AA64PFR2_EL1.MTESTOREONLY and ID_AA64PFR2_EL1.MTEFAR or however cpuinfo reports them.

Those are the baseline implementation of enhanced memory tagging extensions, although there are more, and they’re completely optional silicon. Defined by a standard the tensor g3 processor in your pixel 8 adheres to but not required to be present.

E: I might be using some of the wrong language here for arm stuff. I spend more time in the esp world.

[-] grue@lemmy.world 2 points 21 hours ago

cat /proc/cpuinfo gives me a bunch of copies of this (one per CPU core):

$ cat /proc/cpuinfo
processor       : 0                                                             
BogoMIPS        : 49.15                                                         
Features        : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdh
p cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm
 dit uscat ilrcpc flagm sb paca pacg dcpodp sve2 sveaes svepmull svebitperm sves
ha3 svesm4 flagm2 frint svei8mm svebf16 i8mm bti mte mte3                       
CPU implementer : 0x41                                                          
CPU architecture: 8                                                             
CPU variant     : 0x1                                                         
CPU part        : 0xd46                                                         
CPU revision    : 1         

Not sure how "MTE3" relates to "EMTE"...

[-] TrollAccount69@lemmy.ml 2 points 20 hours ago* (last edited 3 hours ago)

Feat_mte4 is emte. You just have normal mte (it’s not just normal mte, mte3 means you also have mte2 and can do I think four different kinds of tagged memory management. It’s really powerful but it isn’t emte).

E: I just wanna toot my own horn here and congratulate me on correctly remembering details from someone else’s work while posting on the toilet. Not today cognitive decline, not today.

this post was submitted on 29 Aug 2026
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