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I have to design a programmable frequency/clock divider circuit using the 4029 IC. Theoretically, the circuit should start to count down backwards from a given number and when it reaches 0, the 4029 should load the data from the ABCD pins.

The issue is that the countdown stops at 0 and PE doesn't get back to the LOW state. It loads the number, but the SR latch never changes its state so the IC can start counting again. I tried everything and nothing fixes the issue. What can be done in this case? Thanks 🍻

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[-] henfredemars@infosec.pub 3 points 3 months ago

Is your reset input into the latch connected to the clock pin? Was that intentional?

[-] SebiTCR@lemmy.world 2 points 3 months ago

Yep. I wanted to store the CO signal for one tick in order to load the data and the next tick we want to disable that signal so the circuit can count again.

[-] henfredemars@infosec.pub 3 points 3 months ago* (last edited 3 months ago)

So I’ve been racking my brain over this problem for a while, and I think your problem is that you should be running a synchronous latch.

By doing this asynchronously, the CO pulse will be an extremely narrow glitch. As soon as you reach zero, the latch will set, which will load the data bits immediately, which will suddenly bounce CO back as fast as signaling allows. Remember that PE is asynchronous. As soon as it goes high, it will quickly become no longer true that we have a carry out, on the order of nanoseconds. This could be shorter than the minimum pulse width requirement of your latch gates which might not yet have had time to finish stabilizing. I could see that causing the latch to misbehave.

I don’t know if having such a skinny pulse could violate timing constraints on your gates.

[-] SebiTCR@lemmy.world 2 points 3 months ago

Seems like that was the issue. Thanks a lot for the help 🍻 :) I replaced the SR latch with a D Flip Flop and everything works perfect.

this post was submitted on 31 May 2026
14 points (93.8% liked)

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